The present invention relates generally to a storage system that controls the reading/writing of data from/to a storage device in response to requests from a host computer; and a control method for the storage system.
Recently, the amount of data handled by computer systems has increased dramatically. For storage systems managing such a large amount of data, large-scale storage systems, such as those called midrange class or enterprise class storage systems, where data is controlled by a RAID (Redundant Arrays of Inexpensive Disks) system providing huge storage resources, have been a focus of attention.
For these large-scale storage systems, it is essential to enhance the data transfer speed by disk array controllers that control the reading/writing of data from/to the storage devices in response to requests from host computers. For example, Japanese Patent Publication No. 2005-157576 proposes a data processing apparatus where a selector switches paths on a priority basis according to the types of data.
Also, it is desirable for these large-scale storage systems to prevent performance degradation by avoiding concentration of accesses to cache memories that temporarily store the data read/written by the storage devices. For example, Japanese Patent Publication No. 2004-110503 proposes a storage system where each of two channel controllers—that control communication between a storage system and host computers—has a cache memory and these cache memories in the channel controllers are connected to each other via a dedicated data transfer path.
Conventional storage systems, however, have the following problems.
First, sharing the control information in the local memory in a controller with another controller is based on the premise that each controller operates normally so, when a failure occurs in either controller, sharing can no longer be realized.
Conventionally, sharing of the control information involves sharing only some parts of the control information. If all the control information can be shared, complicated operations become possible because the amount of shared information increases and, consequently, high-functionality storage systems, as opposed to conventional storage systems, can be provided. One conceivable technique is to share the control information among the respective cache memories.
However, perfect sharing of the control information among the different systems requires a memory capacity for storing information that has not been shared so far, and accordingly, a large-capacity cache memory for storing such a large-capacity control information is essential. Moreover, in a conventional system, because the amount of data transferred by DMA transfer via paths between other controllers to share data increases, the system performance degrades.
Moreover, when storing the control information that has been stored in a local memory in a cache memory, the physical distance between a CPU and the cache memory becomes long and, as a result of the latency in the data controller, data transmission between the CPU and the cache memory requires a lot of time.
Second, regarding the enhancement of the controller's operation speed, because of the recent refined LSI manufacturing process, wiring delay influences are more evident than gate delay influences. Moreover, in keeping with the tendency toward high-functionality and large-scale LSIs, the number of internal blocks increases and, in order to connect these internal blocks with an internal bus, the number of fan-outs and the length of wires also increase. Because of these reasons, there is a limit to enhancing the operation speed of LSIs and the packaging layout becomes difficult. Japanese Patent No. 2005-157576 does not mention wiring constraints in the data paths between the internal selectors, so it is not a technique for fundamentally solving the aforementioned problems.
Third, regarding system reliability, in a system having a CPU unit with a data protection function, when a failure occurs the CPU unit, system reliability is secured by reporting the failure occurrence to the controller and stopping the operation of the controller so as to prevent malfunctioning of the controller.
Such a method as the one above has demerits in that wires for data protection, such as parity, have to be added in LSIs and that processing becomes complicated because of the need to verify the correctness of data. In light of these circumstances, some recent storage systems do not have data protection functions. When a failure occurs in such storage systems, incorrect data is written in controllers and consequently, data is written in unexpected storage areas such as cache memory and storage devices. Moreover, this error spreads to other controllers, also makes redundant controllers—provided for high reliability—malfunction, resulting in a serious problem in the entire storage system.
This invention aims to provide a high-functionality storage system with excellent failure tolerance that can solve the foregoing problems; and a method for controlling the storage system.